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Date Available
12-7-2011
Year of Publication
2009
Document Type
Thesis
Degree Name
Master of Science in Electrical Engineering (MSEE)
College
Engineering
Department/School/Program
Electrical Engineering
Faculty
Dr. Bruce Walcott
Faculty
Dr. Stephen Gedney
Abstract
Verification and debug of integrated circuits for embedded applications has grown in importance as the complexity in function has increased dramatically over time. Various modeling and debugging techniques have been developed to overcome the overwhelming challenge. This thesis attempts to address verification and debug methods by presenting an accurate C model at the bit and algorithm level coupled with an implemented Hardware Description Language (HDL). Key concepts such as common signal and variable naming conventions are incorporated as well as a stepping function within the implemented HDL. Additionally, a common interface between low-level drivers and C models is presented for early firmware development and system debug. Finally, selfchecking verification is discussed for delivering multiple test cases along with testbench portability.
Recommended Citation
Crutchfield, David Allen, "VERIFICATION AND DEBUG TECHNIQUES FOR INTEGRATED CIRCUIT DESIGNS" (2009). University of Kentucky Master's Theses. 631.
https://uknowledge.uky.edu/gradschool_theses/631
