Author ORCID Identifier

https://orcid.org/0000-0001-5929-2288

Date Available

1-5-2026

Year of Publication

2026

Document Type

Master's Thesis

Degree Name

Master of Science in Electrical Engineering (MSEE)

College

Engineering

Department/School/Program

Electrical and Computer Engineering

Faculty

Vijay Singh

Faculty

Aaron Cramer

Abstract

This Thesis finds a pathway to a significantly high-efficient CdTe based solar cell by demonstrating and harvesting the advantages of a nano-structure configuration in CdTe based solar cells. Nanowire CdS window layer and the “control”, planar CdS window layer films were fabricated in the laboratory and compared for their optical transmission and other characteristics affecting the performance of the CdS-CdTe solar cell. Numerical simulations were performed for a comparative evaluation of the embedded nanowire CdS-CdTe solar cell device and the traditional planar CdS-CdTe solar cell device. Experimentally measured spectral transmission of nanowire CdS film was used in the simulation environment. Embedded nanowire design yielded higher short circuit current (JSC), Open-circuit voltage (VOC) and power conversion efficiency (PCE) than the traditional planar CdS-CdTe solar cell. A 0.9 mA/cm2 increase in JSC (from 28.5 mA/cm2 for the planar case to 29.4 mA/cm2 for the nanowire case), a 30 mV to 100 mV increase in VOC and a 1.6% increase in PCE (from 25.2% for the planar case to 26.8% for the nanowire case) was obtained. The increase in current was due to higher transmission of photons through the nanowire window layer which eventually increased the photon absorption in the CdTe absorber. The open-circuit voltage (VOC) increased due to a reduction in the number of interface states at the junction owing to a reduced junction area in our stacked nanowire device design. VOC increase in nanowire device is dependent on the interface recombination velocity. In the case of a higher recombination velocity, the absolute increase in VOC was as big as 100 mV whereas for a lower recombination velocity the increase was as small as 30 mV. As expected, VOCincreases with the decrease of interface state density. However, VOC increases with the increase of acceptor (hole) density only up to a certain point (1017 cm-3). With an optimum combination of high hole density, high carrier lifetime and low interface recombination, a record high VOC of 1.09 V, JSC of 29.4 mA cm-2, and a power conversion efficiency of 26.8% could be achieved for the embedded nanowire CdS-CdTe solar cell.

Digital Object Identifier (DOI)

https://doi.org/10.13023/etd.2025.505

Download

Share

COinS